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EL5170, EL5370
Data Sheet May 7, 2007 FN7309.7
100MHz Differential Twisted-Pair Drivers
The EL5170 and EL5370 are single and triple high bandwidth amplifiers with a fixed gain of 2. They are primarily targeted for applications such as driving twisted-pair lines in component video applications. The inputs signal can be in either singleended or differential form but the outputs are always in differential form. The output common mode level for each channel is set by the associated VREF pin, which have a -3dB bandwidth of over 70MHz. Generally, these pins are grounded but can be tied to any voltage reference. All outputs are short circuit protected to withstand temporary overload condition. The EL5170 and EL5370 are specified for operation over the full -40C to +85C temperature range.
Features
* Fully differential inputs and outputs * Differential input range 2.3V typ. * 100MHz 3dB bandwidth at fixed gain of 2 * 1100V/s slew rate * Single 5V or dual 5V supplies * 50mA maximum output current * Low power - 7.4mA per channel * Pb-free plus anneal available (RoHS compliant)
Applications
* Twisted-pair drivers * Differential line drivers * VGA over twisted-pairs
Pinouts
EL5170 (8 LD SOIC, MSOP) TOP VIEW
IN+ 1 EN 2 IN- 3 REF 4 + 8 OUT+ 7 VS6 VS+ 5 OUTEN 1 INP1 2 INN1 3 REF1 4 NC 5 INP2 6 INN2 7 REF2 8 NC 9 INP3 10 INN3 11 REF3 12 + + -
* ADSL/HDSL drivers
EL5370 (24 LD QSOP) TOP VIEW
+ 24 OUT1 23 OUT1B 22 NC 21 VSP 20 VSN 19 NC 18 OUT2 17 OUT2B 16 NC 15 OUT3 14 OUT3B 13 NC
* Single ended to differential amplification * Transmission of analog signals in a noisy environment
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002, 2003, 2004, 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5170, EL5370 Ordering Information
PART NUMBER EL5170IS EL5170IS-T7 EL5170IS-T13 EL5170ISZ (Note) EL5170ISZ-T7 (Note) EL5170ISZ-T13 (Note) EL5170IY EL5170IY-T7 EL5170IY-T13 EL5170IYZ (Note) EL5170IYZ-T7 (Note) EL5170IYZ-T13 (Note) EL5370IU EL5370IU-T7 EL5370IU-T13 EL5370IUZ (Note) EL5370IUZ-T7 (Note) EL5370IUZ-T13 (Note) PART MARKING 5170IS 5170IS 5170IS 5170ISZ 5170ISZ 5170ISZ g g g BAAVA BAAVA BAAVA EL5370IU EL5370IU EL5370IU EL5370IUZ EL5370IUZ EL5370IUZ TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PACKAGE 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) (Pb-free) 8 Ld MSOP (3.0mm) (Pb-free) 8 Ld MSOP (3.0mm) (Pb-free) 24 Ld QSOP (150 mil) 24 Ld QSOP (150 mil) 24 Ld QSOP (150 mil) 24 Ld QSOP (150 mil) (Pb-free) 24 Ld QSOP (150 mil) (Pb-free) 24 Ld QSOP (150 mil) (Pb-free) PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN7309.7 May 7, 2007
EL5170, EL5370
Absolute Maximum Ratings (TA = +25C)
Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C
Thermal Information
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135C Recommended Operating Temperature . . . . . . . . . .-40C to +85C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW BW SR TSTL TOVR -3dB Bandwidth
VS+ = +5V, VS- = -5V, TA = +25C, VIN = 0V, AV = 2, RLD = 200, CLD = 1pF, Unless Otherwise Specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
100 12 VOUT = 2VP-P, 20% to 80% VOUT = 2VP-P 800 1100 20 40 AV =1, CLD = 2.7pF VOUT = 2VP-P, 20% to 80% VOUT = 2VP-P, 20% to 80% f = 10kHz VOUT = 2VP-P, 1MHz VOUT = 2VP-P, 10MHz VOUT = 2VP-P, 1MHz VOUT = 2VP-P, 10MHz RLD = 300, AV = 2 RLD = 300, AV = 2 at f = 1MHz 70 125 65 28 -79 -65 -62 -43 0.14 0.38 85
MHz MHz V/s ns ns MHz V/s V/s nV/Hz dBc dBc dBc dBc % dB
0.1dB Bandwidth Slew Rate Settling Time to 0.1% Output Overdrive Recovery time
VREFBW (-3dB) VREF -3dB Bandwidth VREFSR+ VREFSRVN HD2 HD2 HD3 HD3 dG d eS VREF Slew Rate - Rise VREF Slew Rate - Fall Input Voltage Noise Second Harmonic Distortion Second Harmonic Distortion Third Harmonic Distortion Third Harmonic Distortion Differential Gain at 3.58MHz Differential Phase at 3.58MHz Channel Separation - For EL5370 only
INPUT CHARACTERISTICS VOS IIN IREF Input Referred Offset Voltage Input Bias Current (VIN, VINB) Input Bias Current at REF Pin VREF = +3.2V VREF = -3.2V Gain RIN CIN DMIR CMIR+ CMIRGain Accuracy Differential Input Resistance Differential Input Capacitance Differential Mode Input Range Common Mode Positive Input Range at VIN+, VINCommon Mode Negative Input Range at VIN+, VIN2.1 3.2 VIN = 1V -10 0.5 -1 1.98 6 -6 1.25 0 2 300 1 2.3 3.4 -4.5 -4.2 25 -2 3 +1 2.02 mV A A A V k pF V V V
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FN7309.7 May 7, 2007
EL5170, EL5370
Electrical Specifications
PARAMETER VREFIN VS+ = +5V, VS- = -5V, TA = +25C, VIN = 0V, AV = 2, RLD = 200, CLD = 1pF, Unless Otherwise Specified. (Continued) CONDITIONS MIN 3.4 TYP 3.8 -3.3 -140 VIN = 2.5V 65 60 84 -3 +140 MAX UNIT V V mV dB
DESCRIPTION
Reference Input Voltage Range - Positive VIN+ = VIN- = 0V Reference Input Voltage Range Negative
VREFOS CMRR
Output Offset Relative to VREF Input Common Mode Rejection Ratio
OUTPUT CHARACTERISTICS VOUT Positive Output Voltage Swing Negative Output Voltage Swing IOUT(Max) Maximum Output Current RL = 10 (EL5170) RL = 10 (EL5370) ROUT SUPPLY VSUPPLY IS(ON) IS(OFF)+ IS(OFF)IS(OFF)+ IS(OFF)PSRR Supply Operating Range Power Supply Current - Per channel Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5170) Negative Power Supply Current Disabled Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5370) Negative Power Supply Current Disabled Power Supply Rejection Ratio VS from 4.5V to 5.5V (EL5170) VS from 4.5V to 5.5V (EL5370) ENABLE tEN tDS VIH VIL IIH-EN IIL-EN Enable Time Disable Time EN Pin Voltage for Power-up EN Pin Voltage for Shut-down EN Pin Input Current High - per channel EN Pin Input Current Low - per channel At VEN = 5V At VEN = 0V -6 VS+ 0.5 40 -3 50 200 1 VS+ 1.5 ns s V V A A VS+ to VS4.75 6 60 -150 0.5 -150 70 65 7.4 80 -120 2 -120 83 83 11 8.4 100 -90 5 -90 V mA A A A A dB dB Output Impedance 50 70 RLD = 200 3.3 3.6 -3.3 80 85 60 -3 V V mA mA m
Pin Descriptions
EL5170 1 2 3 4 5 6 7 8 EL5370 2, 6, 10 1 3, 7, 11 4, 8, 12 14, 17, 23 21 20 15, 18, 24 5, 9, 13, 16, 19, 22 PIN NAME IN+, INP1, 2, 3 EN IN-, INN1, 2, 3 REF1, 2, 3 VS+, VSP VS-, VSN OUT+, OUT1, 2, 3 NC Non-inverting inputs Enable Inverting inputs Reference input, sets common-mode output voltage Positive supply Negative supply Non-inverting outputs No connects, grounded for best crosstalk performance PIN FUNCTION
OUT-, OUT1B, 2B, 3B Inverting outputs
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FN7309.7 May 7, 2007
Connection Diagrams
EL5170
RS1 50 INP EN INN REF RS2 50 RS3 50 1 INP 2 EN 3 INN 4 REF OUT 8 50 VSN 7 VSP 6 RRT2 OUTB 5 50 +5V LOADN -5V RRT2 LOADP
5
INP1 INN1 REF1 INP2 INN2 REF2 INP3 INN3 REF3 RSP1 50
FN7309.7 May 7, 2007
EL5370
+5V ENABLE RRT1 1 EN 2 INP1 3 INN1 4 REF1 5 NC 6 INP2 7 INN2 8 REF2 9 NC 10 INP3 11 INN3 12 REF3 RSN1 50 RSR1 50 RSP2 50 RSN2 50 RSR2 50 RSP3 50 RSN3 50 RSR3 50 -5V OUT1 24 RRT1B OUT1B 23 50 NC 22 VSP 21 VSN 20 NC 19 RRT2 OUT2 18 RRT2B OUT2B 17 50 NC 16 RRT3 OUT3 15 RRT3B OUT3B 14 50 NC 13 50 LD3B LD3 50 LD2B LD2 50 LD1B LD1
EL5170, EL5370
EL5170, EL5370 Typical Performance Curves
VS = 5V, AV = 2, RLD = 200, CLD = 1pF 10 9 8 7 GAIN (dB) 5 4 3 2 1 0 100K 1M VOP-P = 2V VOP-P = 1V 10M FREQUENCY (Hz) 100M 1G VOP-P = 200mV GAIN (dB) 6 10 9 8 7 6 5 4 3 2 1 0 100K 1M RLD = 200 RLD = 100 10M FREQUENCY (Hz) 100M 1G RLD = 1k RLD = 500 CLD = 1pF, VODP-P = 200mV
FIGURE 1. FREQUENCY RESPONSE
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs RLD
VS = 5V, RLD = 200, VODP-P = 200mV 11 10 9 8 GAIN (dB) 7 6 5 4 3 2 1 100K 1M 10M FREQUENCY (Hz) 100M 1G CLD = 0pF CLD = 20pF CLD = 75pF GAIN (dB) CLD = 40pF
4 3 2 1 0 -1 -2 -3 -4 -5 -6 1M 10M FREQUENCY (Hz) 100M VREF = 1VP-P VREF = 200mVP-P
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs CLD
FIGURE 4. FREQUENCY RESPONSE vs VREF
VINCM
100 + VODM 100 VOCM
0 -10 -20 -30 PSRR (dB) -40 -50 -60 -70 -80 -90 100K 1M 10M 100M PSRRPSRR+ COMMON MODE REJECTION (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -90 100K 1M 10M 100M VODM/VINCM VOCM/VINCM
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. POWER SUPPLY REJECTION RATIO vs FREQUENCY
FIGURE 6. COMMON MODE REJECTION vs FREQUENCY
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FN7309.7 May 7, 2007
EL5170, EL5370 Typical Performance Curves
VIN RT 100 + R
(Continued)
VODM 100
VCM
0 -10 BALANCE ERROR (dB) -20 -30 -40 -50 -60 100K VOCM/VODM
1000 VOLTAGE NOISE (nV/Hz)
100
1M
10M
100M
10 10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQENCY (Hz)
FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE ERROR vs FREQUENCY
FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY
-40 CHANNEL ISOLATION (dB) -50 -60 -70 -80 -90 CH3<=>CH1 -100 -110 100K 1M CH1<=>CH3 10M 100M CH2<=>CH1 CH3<=>CH2 BW (MHz) CH2<=>CH3 CH1<=>CH2
RLD = 200 110 105 100 95 90 85 80 4
5
6
7
8 VS (V)
9
10
11
12
FREQENCY (Hz)
FIGURE 9. CHANNEL ISOLATION vs FREQUENCY
FIGURE 10. BANDWIDTH vs SUPPLY VOLTAGE
7.78 7.76 DISTORTION (dB) 7.74 7.72 7.7 IS (mA) 7.68 7.66 7.64 7.62 7.6 7.58 4 5 6 7 VS (V) 8 9 10 11 ISIS+
-30 -40 -50 -60 -70 -80 -90
VS = 5V, RLD = 200, VOP-P = 2V HD3
HD2
0
2
4
6
8
10
12
14
16
18
20
FREQUENCY (MHz)
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 12. HARMONIC DISTORTION vs FREQUENCY
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FN7309.7 May 7, 2007
EL5170, EL5370 Typical Performance Curves
(Continued)
0.5V/DIV
500mV/DIV
40ns/DIV
20ns/DIV
FIGURE 13. VCOM TRANSIENT RESPONSE
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
100mV/DIV
20ns/DIV
FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 16. DISABLED RESPONSE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.2 POWER DISSIPATION (W) 1 0.8 625mW 0.6 0.4 486mW 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) MSOP8 JA=206C/W SO8 JA=160C/W
870mW QSOP24 JA=115C/W
FIGURE 17. ENABLED RESPONSE
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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FN7309.7 May 7, 2007
EL5170, EL5370 Typical Performance Curves
(Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 POWER DISSIPATION (W) 1.2 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) MSOP8/10 JA=115C/W 1.136W 909mW 870mW QSOP24 JA=88C/W SO8 JA=110C/W
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic
200 VS+ R3 R1 R2 R7 R8 R4
IN+
IN-
FBP
FBN
VB1 OUT+ RCD REF RCD VB2 CC R5 VSR6 OUTR9 R10
CC
400
200
Description of Operation and Application Information
Product Description
The EL5170 and EL5370 are wide bandwidth, low power and single/differential ended to differential output amplifiers. They have a fixed gain of 2. The EL5170 is a single channel differential amplifier. The EL5370 is a triple channel differential amplifier. The EL5170 and EL5370 have a -3dB bandwidth of 100MHz while driving a 200 differential load. The EL5170 and EL5370 are available with a power down feature to reduce the power while the amplifiers are disabled.
Input, Output and Supply Voltage Range
The EL5170 and EL5370 have been designed to operate with a single supply voltage of 5V to 10V or a split supplies with its total voltage from 5V to 10V. The amplifiers have an input common mode voltage range from -4.5V to 3.4V for 5V supply. The differential mode input range (DMIR) between the two inputs is from -2.3V to +2.3V. The input voltage range at the REF pin is from -3.3V to 3.8V. If the input common mode or differential mode signal is outside the above-specified ranges, it will cause the output signal distorted. The output of the EL5170 and EL5370 can swing from -3.3V to 3.6V at 200 differential load at 5V supply. As the load resistance becomes lower, the output swing is reduced.
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FN7309.7 May 7, 2007
EL5170, EL5370
Differential and Common Mode Gain Settings
As shown at the simplified schematic, since the feedback resistors RF and the gain resistor are integrated with 200 and 400, the EL5170 and EL5370 have a fixed gain of 2. The common mode gain is always one.
T JMAX - T AMAX PD MAX = ------------------------------------------- JA
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or:
V O PD = i x V S x I SMAX + V S x ----------- R LD
Driving Capacitive Loads and Cables
The EL5170 and EL5370 can drive 75pF differential capacitor in parallel with 200 differential load with less than 3.5dB of peaking. If less peaking is desired in applications, a small series resistor (usually between 5 to 50) can be placed in series with each output to eliminate most peaking. However, this will reduce the gain slightly. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
Where: VS = Total supply voltage ISMAX = Maximum quiescent supply current per channel VO = Maximum differential output voltage of the application RLD = Differential load resistance ILOAD = Load current i = Number of channels By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat.
Disable/Power-Down
The EL5170 and EL5370 can be disabled and placed their outputs in a high impedance state. The turn off time is about 1s and the turn on time is about 200ns. When disabled, the amplifier's supply current is reduced to 2A for IS+ and 120A for IS- typically, thereby effectively eliminating the power consumption. The amplifier's power down can be controlled by standard CMOS signal levels at the ENABLE pin. The applied logic signal is relative to VS+ pin. Letting the EN pin float or applying a signal that is less than 1.5V below VS+ will enable the amplifier. The amplifier will be disabled when the signal at EN pin is above VS+ -0.5V.
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as sort as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
Output Drive Capability
The EL5170 and EL5370 have internal short circuit protection. Its typical short circuit current is 80mA. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds 60mA. This limit is set by the design of the internal metal interconnect.
Power Dissipation
With the high output drive capability of the EL5170 and EL5370 it is possible to exceed the 125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
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FN7309.7 May 7, 2007
EL5170, EL5370 Typical Applications
0
50 IN+ EL5170/ EL5370 INZO = 100 50
VFB VIN EL5172/ EL5372
VOUT
50 50
VINB VREF
FIGURE 20. TWISTED PAIR DRIVER
0
IN+
+ EL5170/ EL5370 IN-
VFB VIN VINB VREF EL5172/ EL5372 VOUT
FIGURE 21. DUAL COAXIAL CABLE DRIVER
10V
VIN
IN+ EL5170/ EL5370 IN-
FIGURE 22. SINGLE SUPPLY TWISTED PAIR DRIVER
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FN7309.7 May 7, 2007
EL5170, EL5370
EL5172/ EL5372 IN+ EL5170/ EL5370 INEL5172
FIGURE 23. DUAL SIGNAL TRANSMISSION CIRCUIT
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FN7309.7 May 7, 2007
EL5170, EL5370 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
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FN7309.7 May 7, 2007
EL5170, EL5370 Quarter Size Outline Plastic Packages Family (QSOP)
A D N (N/2)+1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1 I.D. MARK
A A1 A2 b
0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16
0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24
0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28
Max. 0.002 0.004 0.002 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference
1, 3 2, 3 Rev. F 2/07
E
E1
1 B 0.010 CAB
(N/2)
c D E
e C SEATING PLANE 0.004 C 0.007 CAB b
H
E1 e L L1 N
L1 A c SEE DETAIL "X"
NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010 A2 GAUGE PLANE L 44 DETAIL X
A1
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FN7309.7 May 7, 2007
EL5170, EL5370 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 15
FN7309.7 May 7, 2007

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